1. Field of the Invention
The present invention relates to a printed circuit board and a method of manufacturing the same.
2. Description of the Background Art
Conventionally, a COF (Chip On Film) mounting technique has been known as a technique for mounting electronic components such as an LSI (Large Scale Integration) on a film-like substrate. In general, the substrate for COF (hereinafter referred to as the COF substrate) has a two-layer structure of an insulating layer made of polyimide and conductive traces made of copper. Terminals are formed on the conductive traces. Terminals (bumps) of the electronic components are bonded to the terminals of the conductive traces.
With finer pitches of the COF substrate and higher performance of the electronic components, heating values during operation of the electronic components increase. This causes problems such as a malfunction of the electronic components in some cases; therefore, it is important to carry out sufficient heat dissipation. Thus, it has been proposed to provide a metal layer for heat dissipation on a back surface (a surface to which the electronic components are not bonded) of the insulating layer of the COF substrate.
In a tape circuit board disclosed in JP 2007-27682 A, for example, the metal layer is formed, below a chip mounting region, on a lower surface of a base film.
FIG. 12 is a schematic sectional view of a conventional COF substrate provided with the metal layer. In the COF substrate 200 of FIG. 12, conductor traces 52 are provided on one surface of the insulating layer 51 while the metal layer 53 is provided on the other surface. Bumps 55a of an electronic component 55 are bonded to terminals of the conductor traces 52. Such a configuration allows heat of the electronic component 55 to be dissipated through the metal layer 53.
The electronic component 55 is connected to the terminals of the conductor traces 52 by thermocompression bonding, for example. In the case, the insulating layer 51 and the metal layer 53 of the COF substrate 200 are expanded by heat. In addition, the insulating layer 51 and the metal layer 53 are also expanded by heat generated by the electronic component 55 during the operation of the electronic component 55.
Distances between the bumps 55a of the electronic component 55 are much smaller than an expansion volume of the metal layer 53. Therefore, stresses are applied to the terminals of the conductor traces 52 when the insulating layer 51 and the metal layer 53 are expanded.
Since the insulating layer 53 is flexed in the case of no metal layer 53 provided, the stresses applied to the terminals are relieved. When the metal layer 53 is provided, however, the insulating layer 51 is unlikely to be flexed, thus not relieving the stresses applied to the terminals.
As a result, the conductor traces 52 are stripped from the insulating layer, or the terminals of the conductor traces 52 are separated from the bumps 55a of the electronic component 55 in some cases.